While Speculative Multithreading (SM) on a Chip Multiprocessor (CMP) has the ability to speed-up hard-toparallelize applications, the power inefficiency of aggressive speculation ...
We consider the setting of a multiprocessor where the speeds of the m processors can be individually scaled. Jobs arrive over time and have varying degrees of parallelizability. A...
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
Lide Zhang, Lan S. Bai, Robert P. Dick, Li Shang, ...
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...
A new heterogeneous multiprocessor system with dynamic memory and power management for improved performance and power consumption is presented. Increased data locality is automatic...