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» Improvement of ASIC Design Processes
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DAC
2004
ACM
13 years 11 months ago
A methodology to improve timing yield in the presence of process variations
The ability to control the variations in IC fabrication process is rapidly diminishing as feature sizes continue towards the sub-100 nm regime. As a result, there is an increasing...
Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wa...
FPGA
2005
ACM
105views FPGA» more  FPGA 2005»
14 years 1 months ago
Soft error rate estimation and mitigation for SRAM-based FPGAs
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
Ghazanfar Asadi, Mehdi Baradaran Tahoori
IJAMC
2008
99views more  IJAMC 2008»
13 years 7 months ago
Improving Educational Multimedia selection process using group decision support systems
Educational Multimedia (EMM) is becoming a mature and integral part of teaching and learning systems, mainly due to its ability improve teaching and learning. However, EMM selecti...
Mohammed N. A. Abdelhakim, Shervin Shirmohammadi
ICMCS
2006
IEEE
113views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Enhanced Architectural Support for Variable-Length Decoding
This paper proposes a new architecture for efficient variable-length decoding (VLD) of entropy-coded data for multimedia applications on general-purpose processors. It improves o...
Mohanarajah Sinnathamby, Subramania Sudharsanan, N...
AGENTS
2001
Springer
13 years 12 months ago
Improving the agent-oriented modeling process by roles
The agent-oriented modeling process is divided in a typical sequence of activities, i.e., requirements specification, analysis, and design. The requirements are specified by des...
Ralph Depke, Reiko Heckel, Jochen Malte Küste...