In this paper we provide a method to analytically compute the energy saving provided by the use of transmission power control (TPC) at the MAC layer in wireless sensor networks (W...
This paper presents a new scheduling technique to improve the speed, power, and scalability of a dynamic scheduler. In a high-performance superscalar processor, the instruction sc...
—In order to meet the increasing demands of present and upcoming data-intensive computer applications, there has been a major shift in the disk subsystem, which now consists of m...
Rajat Garg, Seung Woo Son, Mahmut T. Kandemir, Pad...
Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of dig...
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki ...
Instruction window is a key component which extracts Instruction Level Parallelism (ILP) in modern out-of-order microprocessors. In order to exploit ILP for improving processor pe...
Shingo Watanabe, Akihiro Chiyonobu, Toshinori Sato