With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power/ground distribution networks poses a difficult problem in modern IC d...
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
—Distributed MIMO multi-hop relaying is one of the most promising technologies that permits cost-effective improvement of coverage, data rate and end-to-end (e2e) user experience...
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
- This paper presents a precomputation-based guarding technique to reduce both dynamic and static power consumptions in CMOS VLSI circuits. More precisely, a high threshold sleep t...