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VLSID
2006
IEEE
148views VLSI» more  VLSID 2006»
14 years 9 months ago
Efficient Design and Analysis of Robust Power Distribution Meshes
With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power/ground distribution networks poses a difficult problem in modern IC d...
Puneet Gupta, Andrew B. Kahng
IPPS
2007
IEEE
14 years 3 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
ICC
2009
IEEE
186views Communications» more  ICC 2009»
14 years 3 months ago
Power Allocations for Adaptive Distributed MIMO Multi-Hop Networks
—Distributed MIMO multi-hop relaying is one of the most promising technologies that permits cost-effective improvement of coverage, data rate and end-to-end (e2e) user experience...
Yidong Lang, Dirk Wübben, Karl-Dirk Kammeyer
GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
14 years 2 months ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
14 years 5 months ago
Precomputation-based Guarding for Dynamic and Leakage Power Reduction
- This paper presents a precomputation-based guarding technique to reduce both dynamic and static power consumptions in CMOS VLSI circuits. More precisely, a high threshold sleep t...
Afshin Abdollahi, Massoud Pedram, Farzan Fallah, I...