196 search results - page 21 / 40 » Improving IPC by Kernel Design |
ICPP
2003
IEEE
14 years 27 days ago
2003
IEEE
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...
MICRO
2002
IEEE
14 years 16 days ago
2002
IEEE
Register integration (or just integration) is a register renaming discipline that implements instruction reuse via physical register sharing. Initially developed to perform squash...
ICS
2001
Tsinghua U.
14 years 1 days ago
2001
Tsinghua U.
A large logical register file is important to allow effective compiler transformations or to provide a windowed space of registers to allow fast function calls. Unfortunately, a l...
ICS
2010
Tsinghua U.
13 years 10 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
ASPLOS
2006
ACM
13 years 11 months ago
2006
ACM
This paper proposes new network interface controller (NIC) designs that take advantage of integration with the host CPU to provide increased flexibility for operating system kerne...