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» Improving Java performance using hardware translation
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113
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ICS
2005
Tsinghua U.
15 years 8 months ago
Improved automatic testcase synthesis for performance model validation
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...
Robert H. Bell Jr., Lizy Kurian John
127
Voted
MICRO
2009
IEEE
148views Hardware» more  MICRO 2009»
15 years 9 months ago
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
Sangyeun Cho, Hyunjin Lee
111
Voted
HPCA
1999
IEEE
15 years 6 months ago
Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance
In general-purpose microprocessors, recent trends have pushed towards 64-bit word widths, primarily to accommodate the large addressing needs of some programs. Many integer proble...
David Brooks, Margaret Martonosi
142
Voted
IWMM
2007
Springer
146views Hardware» more  IWMM 2007»
15 years 8 months ago
Allocation-phase aware thread scheduling policies to improve garbage collection performance
Past studies have shown that objects are created and then die in phases. Thus, one way to sustain good garbage collection efficiency is to have a large enough heap to allow many ...
Feng Xian, Witawas Srisa-an, Hong Jiang
163
Voted
ISCA
2008
IEEE
205views Hardware» more  ISCA 2008»
15 years 9 months ago
VEAL: Virtualized Execution Accelerator for Loops
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
Nathan Clark, Amir Hormati, Scott A. Mahlke