2032 search results - page 58 / 407 » Improving Java performance using hardware translation |
117
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TAP
2008
Springer
15 years 2 months ago
2008
Springer
Abstract. In this paper we report on our first experiences using the relational analysis provided by the Alloy tool with the theorem prover KIV in the context of specifications of ...
139
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CCECE
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper presents a hardware/software co-design for Multi Protocol Label Switching (MPLS) using RSVP-TE as a signaling protocol. MPLS is the protocol framework on which the atte...
124
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PADL
2004
Springer
15 years 8 months ago
2004
Springer
We describe the current status of and provide performance results for a prototype compiler of Prolog to C, ciaocc. ciaocc is novel in that it is designed to accept different kinds...
214
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ASPLOS
2009
ACM
16 years 3 months ago
2009
ACM
We report on our experience with the hardware transactional memory (HTM) feature of two pre-production revisions of a new commercial multicore processor. Our experience includes a...
128
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ISCA
2010
IEEE
15 years 4 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...