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DSD
2009
IEEE
148views Hardware» more  DSD 2009»
14 years 2 months ago
SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform
—The 2D Discrete Wavelet Transform (DWT) is a time-consuming kernel in many multimedia applications such as JPEG2000 and MPEG-4. The 2D DWT consists of horizontal filtering alon...
Asadollah Shahbahrami, Ben H. H. Juurlink
HIPEAC
2010
Springer
13 years 9 months ago
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo C...
FPGA
2011
ACM
330views FPGA» more  FPGA 2011»
12 years 11 months ago
CoRAM: an in-fabric memory architecture for FPGA-based computing
FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despit...
Eric S. Chung, James C. Hoe, Ken Mai
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
14 years 20 days ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
ICPP
1998
IEEE
13 years 11 months ago
Performance Implications of Architectural and Software Techniques on I/O-Intensive Applications
Many large scale applications, have significant I/O requirements as well as computational and memory requirements. Unfortunately, limited number of I/O nodes provided by the conte...
Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok ...