315 search results - page 11 / 63 » Improving Performance by Branch Reordering |
ICCD
2003
IEEE
14 years 4 months ago
2003
IEEE
Embedded processors like Intel’s XScale use dynamic branch prediction to improve performance. Due to the presence of context switches, the accuracy of these predictors is reduce...
ACSC
2004
IEEE
13 years 11 months ago
2004
IEEE
Matrix multiplication is a basic computing operation. Whereas it is basic, it is also very expensive with a straight forward technique of O(N3 ) runtime complexity. More complex s...
ISLPED
2003
ACM
14 years 24 days ago
2003
ACM
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
To continue to improve processor performance, microarchitects seek to increase the effective instruction level parallelism (ILP) that can be exploited in applications. A fundament...
HIPEAC
2010
Springer
13 years 9 months ago
2010
Springer
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...