Sciweavers

293 search results - page 4 / 59
» Improving Performance by Reducing Aborts in Hardware Transac...
Sort
View
IEEEHPCS
2010
13 years 6 months ago
Transactional Memory: How to perform load adaption in a simple and distributed manner
We analyze and present different strategies to adapt the load in transactional memory systems based on contention. Our experimental results show a substantial overall improvement ...
David Hasenfratz, Johannes Schneider, Roger Watten...
ASPLOS
2011
ACM
12 years 11 months ago
Hardware acceleration of transactional memory on commodity systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan...
HPCA
2006
IEEE
14 years 7 months ago
LogTM: log-based transactional memory
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes p...
Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan...
ISCA
2006
IEEE
125views Hardware» more  ISCA 2006»
14 years 1 months ago
Architectural Semantics for Practical Transactional Memory
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
Austen McDonald, JaeWoong Chung, Brian D. Carlstro...
PPOPP
2010
ACM
14 years 4 months ago
Scheduling support for transactional memory contention management
Transactional Memory (TM) is considered as one of the most promising paradigms for developing concurrent applications. TM has been shown to scale well on multiple cores when the d...
Walther Maldonado, Patrick Marlier, Pascal Felber,...