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ASPDAC
2000
ACM
92views Hardware» more  ASPDAC 2000»
13 years 12 months ago
Co-synthesis with custom ASICs
- This paper introduces the first hardwarekoftware co-synthesis algorithm that optimizes the implementations of ASICs that are used as processing elements for the embedded systems....
Yuan Xie, Wayne Wolf
ISPASS
2010
IEEE
14 years 2 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
CODES
2005
IEEE
14 years 1 months ago
FlexPath NP: a network processor concept with application-driven flexible processing paths
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP...
Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild
ICDCS
2012
IEEE
11 years 10 months ago
Scaling Down Off-the-Shelf Data Compression: Backwards-Compatible Fine-Grain Mixing
—Pu and Singaravelu presented Fine-Grain Mixing, an adaptive compression system which aimed to maximize CPU and network utilization simultaneously by splitting a network stream i...
Michael Gray, Peter Peterson, Peter L. Reiher
SC
2000
ACM
13 years 12 months ago
MPICH-GQ: Quality-of-Service for Message Passing Programs
Parallel programmers typically assume that all resources required for a program’s execution are dedicated to that purpose. However, in local and wide area networks, contention f...
Alain J. Roy, Ian T. Foster, William Gropp, Nichol...