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MAM
2002
110views more  MAM 2002»
13 years 8 months ago
Architecture of a fieldbus message scheduler coprocessor based on the planning paradigm
The use of a centralised planning scheduler in fieldbus-based systems requiring real-time operation has proved to be a good compromise between operational flexibility and timeline...
Ernesto Martins, Paulo A. C. S. Neves, José...
PVLDB
2010
122views more  PVLDB 2010»
13 years 7 months ago
From a Stream of Relational Queries to Distributed Stream Processing
Applications from several domains are now being written to process live data originating from hardware and softwarebased streaming sources. Many of these applications have been wr...
Qiong Zou, Huayong Wang, Robert Soulé, Mart...
ASPLOS
2009
ACM
14 years 9 months ago
Dynamic prediction of collection yield for managed runtimes
The growth in complexity of modern systems makes it increasingly difficult to extract high-performance. The software stacks for such systems typically consist of multiple layers a...
Michal Wegiel, Chandra Krintz
ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
14 years 5 months ago
MC-Sim: an efficient simulation tool for MPSoC designs
The ability to integrate diverse components such as processor cores, memories, custom hardware blocks and complex network-on-chip (NoC) communication frameworks onto a single chip...
Jason Cong, Karthik Gururaj, Guoling Han, Adam Kap...
ISCA
2006
IEEE
125views Hardware» more  ISCA 2006»
14 years 3 months ago
Architectural Semantics for Practical Transactional Memory
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
Austen McDonald, JaeWoong Chung, Brian D. Carlstro...