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DAC
2003
ACM
14 years 8 months ago
Seed encoding with LFSRs and cellular automata
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
Ahmad A. Al-Yamani, Edward J. McCluskey
ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
14 years 4 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen
ICCD
2005
IEEE
100views Hardware» more  ICCD 2005»
14 years 4 months ago
Temporal Decomposition for Logic Optimization
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
Nathan Kitchen, Andreas Kuehlmann
ICCD
2005
IEEE
169views Hardware» more  ICCD 2005»
14 years 4 months ago
ALLCN: An Automatic Logic-to-Layout Tool for Carbon Nanotube Based Nanotechnology
— Since rapid progress has been made in device improvement and integration of small carbon nanotube fieldeffect transistors (CNFETs) circuits, the time has come for developing c...
Wei Zhang, Niraj K. Jha
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 4 months ago
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Mi...