1045 search results - page 131 / 209 » Improving SHA-2 Hardware Implementations |
122
Voted
DAC
2003
ACM
16 years 4 months ago
2003
ACM
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
131
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ICCD
2007
IEEE
16 years 8 days ago
2007
IEEE
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
98
Voted
ICCD
2005
IEEE
16 years 7 days ago
2005
IEEE
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
133
Voted
ICCD
2005
IEEE
16 years 7 days ago
2005
IEEE
— Since rapid progress has been made in device improvement and integration of small carbon nanotube fieldeffect transistors (CNFETs) circuits, the time has come for developing c...
118
Voted
ICCD
2004
IEEE
16 years 7 days ago
2004
IEEE
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...