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ICALP
2009
Springer
14 years 7 months ago
LTL Path Checking Is Efficiently Parallelizable
We present an AC1 (logDCFL) algorithm for checking LTL formulas over finite paths, thus establishing that the problem can be efficiently parallelized. Our construction provides a f...
Lars Kuhtz, Bernd Finkbeiner
ASPLOS
2010
ACM
14 years 2 months ago
CoreDet: a compiler and runtime system for deterministic multithreaded execution
The behavior of a multithreaded program does not depend only on its inputs. Scheduling, memory reordering, timing, and low-level hardware effects all introduce nondeterminism in t...
Tom Bergan, Owen Anderson, Joseph Devietti, Luis C...
DATE
2009
IEEE
183views Hardware» more  DATE 2009»
14 years 2 months ago
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips
Three-dimensional integrated circuits are a promising approach to address the integration challenges faced by current Systems on Chips (SoCs). Designing an efficient Network on C...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
ISCA
2009
IEEE
143views Hardware» more  ISCA 2009»
14 years 2 months ago
Spatio-temporal memory streaming
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
Stephen Somogyi, Thomas F. Wenisch, Anastasia Aila...
MICRO
2009
IEEE
99views Hardware» more  MICRO 2009»
14 years 2 months ago
Low-cost router microarchitecture for on-chip networks
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
John Kim