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ICCAD
2004
IEEE
83views Hardware» more  ICCAD 2004»
14 years 5 months ago
Custom-optimized multiplierless implementations of DSP algorithms
Linear DSP kernels such as transforms and filters are comprised exclusively of additions and multiplications by constants. These multiplications may be realized as networks of ad...
Markus Püschel, Adam C. Zelinski, James C. Ho...
TSP
2008
158views more  TSP 2008»
13 years 8 months ago
High-Speed VLSI Implementation of 2-D Discrete Wavelet Transform
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
Chao Cheng, Keshab K. Parhi
DSD
2010
IEEE
111views Hardware» more  DSD 2010»
13 years 7 months ago
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication
— A method how to improve the coverage of single faults in combinational circuits is proposed. The method is based on Concurrent Error Detection, but uses a fault simulation to f...
Jaroslav Borecky, Martin Kohlik, Hana Kubatova, Pa...
VLSID
2004
IEEE
212views VLSI» more  VLSID 2004»
14 years 9 months ago
On Design and Implementation of an Embedded Automatic Speech Recognition System
We present a new design of an Embedded Speech Recognition System. It combines the aspects of both hardware and software design to implement a speaker dependent, isolated word, sma...
Sujay Phadke, Rhishikesh Limaye, Siddharth Verma, ...
SBACPAD
2003
IEEE
135views Hardware» more  SBACPAD 2003»
14 years 1 months ago
Adaptive Compressed Caching: Design and Implementation
In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
Rodrigo S. de Castro, Alair Pereira do Lago, Dilma...