Sciweavers

1045 search results - page 35 / 209
» Improving SHA-2 Hardware Implementations
Sort
View
MSO
2003
13 years 10 months ago
Simulation based Development of Efficient Hardware for Sort based Algorithms
The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...
Niklas Hansson, Jay H. Harris
TCAD
2008
127views more  TCAD 2008»
13 years 8 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...
SIGGRAPH
1999
ACM
14 years 29 days ago
Realistic, Hardware-Accelerated Shading and Lighting
With fast 3D graphics becoming more and more available even on low end platforms, the focus in hardware-accelerated rendering is beginning to shift towards higher quality renderin...
Wolfgang Heidrich, Hans-Peter Seidel
ISCA
2008
IEEE
185views Hardware» more  ISCA 2008»
13 years 8 months ago
From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware
Dynamic information flow tracking (also known as taint tracking) is an appealing approach to combat various security attacks. However, the performance of applications can severely...
Haibo Chen, Xi Wu, Liwei Yuan, Binyu Zang, Pen-Chu...
AADEBUG
2005
Springer
14 years 2 months ago
Code coverage testing using hardware performance monitoring support
Code coverage analysis, the process of finding code exercised by a particular set of test inputs, is an important component of software development and verification. Most tradit...
Alex Shye, Matthew Iyer, Vijay Janapa Reddi, Danie...