1045 search results - page 36 / 209 » Improving SHA-2 Hardware Implementations |
123
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PDP
2010
IEEE
15 years 7 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
147
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ASPDAC
2000
ACM
15 years 7 months ago
2000
ACM
Multilevel Fiduccia-Mattheyses MLFM hypergraph partitioning 3, 22, 24 is a fundamental optimization in VLSI CAD physical design. The leading implementation, hMetis 23 , has sinc...
242
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ICDE
2009
IEEE
16 years 4 months ago
2009
IEEE
We present the architectural design and recent performance optimizations of a state of the art commercial database replication technology provided in Oracle Streams. The underlying...
114
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DSD
2007
IEEE
15 years 9 months ago
2007
IEEE
The reduction of the cumbersome operations of multiplication, division, and powering to addition, subtraction and multiplication is what makes the Logarithmic Number System (LNS) ...
131
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SIGMETRICS
2008
ACM
15 years 3 months ago
2008
ACM
Local network coding is growing in prominence as a technique to facilitate greater capacity utilization in multi-hop wireless networks. A specific objective of such local network ...