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ICMCS
2006
IEEE
113views Multimedia» more  ICMCS 2006»
14 years 4 months ago
Enhanced Architectural Support for Variable-Length Decoding
This paper proposes a new architecture for efficient variable-length decoding (VLD) of entropy-coded data for multimedia applications on general-purpose processors. It improves o...
Mohanarajah Sinnathamby, Subramania Sudharsanan, N...
ISQED
2006
IEEE
94views Hardware» more  ISQED 2006»
14 years 4 months ago
System-Level SRAM Yield Enhancement
It is well known that SRAM constitutes a large portion of modern integrated circuits, with 80% or more of the total transistors being dedicated to SRAM in a typical processor or S...
Fadi J. Kurdahi, Ahmed M. Eltawil, Young-Hwan Park...
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
14 years 3 months ago
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi,...
CARDIS
2004
Springer
149views Hardware» more  CARDIS 2004»
14 years 3 months ago
Checking and Signing XML Documents on Java Smart Cards
: One major challenge for digitally signing a document is the so called “what you see is what you sign” problem. XML as a meta language for encoding semistructured data offers ...
Nils Gruschka, Florian Reuter, Norbert Luttenberge...
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
14 years 3 months ago
Non-Enumerative Path Delay Fault Diagnosis
The first non-enumerative framework for diagnosing path delay faults using zero suppressed binary decision diagrams is introduced. We show that fault free path delay faults with ...
Saravanan Padmanaban, Spyros Tragoudas