1045 search results - page 95 / 209 » Improving SHA-2 Hardware Implementations |
ICCAD
1994
IEEE
14 years 1 months ago
1994
IEEE
This paper describes a procedure for minimizing the power consumption in a boolean network under the zero delay model. Power is minimized by modifying the function of each interme...
ASPDAC
2008
ACM
14 years 3 hour ago
2008
ACM
In this paper we describe load scheduling, a novel method that balances load among register files by residual resources. Load scheduling can reduce register pressure for clustered...
ASPDAC
2005
ACM
13 years 12 months ago
2005
ACM
— The pressure of fundamental limits on classical computation and the promise of exponential speedups from quantum effects have recently brought quantum circuits to the attention...
EIT
2008
IEEE
13 years 11 months ago
2008
IEEE
Abstract--Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power ...
ISLPED
2010
ACM
13 years 10 months ago
2010
ACM
Runtime characteristics of individual threads (such as IPC, cache usage, etc.) are a critical factor in making efficient scheduling decisions in modern chip-multiprocessor systems...