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MICRO
2009
IEEE
168views Hardware» more  MICRO 2009»
14 years 4 months ago
Ordering decoupled metadata accesses in multiprocessors
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...
Hari Kannan
ICCD
2006
IEEE
77views Hardware» more  ICCD 2006»
14 years 7 months ago
Iterative-Constructive Standard Cell Placer for High Speed and Low Power
Abstract— Timing and low power emerge as the most important goals in contemporary design. Meanwhile, the majority of placement algorithms developed by industry and academia still...
Sungjae Kim, Eugene Shragowitz
DATE
2005
IEEE
106views Hardware» more  DATE 2005»
14 years 3 months ago
SAT-Based Complete Don't-Care Computation for Network Optimization
This paper describes an improved approach to Boolean network optimization using internal don’t-cares. The improvements concern the type of don’t-cares computed, their scope, a...
Alan Mishchenko, Robert K. Brayton
ISCA
2002
IEEE
108views Hardware» more  ISCA 2002»
14 years 2 months ago
The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays
Microprocessor clock frequency has improved by nearly 40% annually over the past decade. This improvement has been provided, in equal measure, by smaller technologies and deeper p...
M. S. Hrishikesh, Doug Burger, Stephen W. Keckler,...
SIGMETRICS
2010
ACM
160views Hardware» more  SIGMETRICS 2010»
14 years 2 months ago
RSIO: automatic user interaction detection and scheduling
We present RSIO, a processor scheduling framework for improving the response time of latency-sensitive applications by monitoring accesses to I/O channels and inferring when user ...
Haoqiang Zheng, Jason Nieh