1117 search results - page 6 / 224 » Improving Testing Efficiency using Cumulative Test Analysis |
DDECS
2007
IEEE
14 years 1 months ago
2007
IEEE
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
State space techniques have proven to be useful for measuring and improving the coverage of test vectors that are used during functional validation via simulation. By comparing th...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Embedded First-In First-Out (FIFO) memories are increasingly used in many IC designs. We have created a new full-custom embedded FIFO module with asynchronous read and write clock...
ICST
2010
IEEE
13 years 5 months ago
2010
IEEE
A Feature Model (FM) is a compact representation of all the products of a software product line. The automated extraction of information from FMs is a thriving research topic invo...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
- We propose a framework to unify the process of false paths and multi-cycle paths in static timing analysis (STA). We use subgraphs attached with timing constraints to represent f...