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HPCA
2008
IEEE
14 years 3 months ago
Prediction of CPU idle-busy activity pattern
Real-world workloads rarely saturate multi-core processor. CPU C-states can be used to reduce power consumption during processor idle time. The key unsolved problem is: when and h...
Qian Diao, Justin J. Song
ISCA
1991
IEEE
162views Hardware» more  ISCA 1991»
14 years 11 days ago
Comparison of Hardware and Software Cache Coherence Schemes
We use mean value analysis models to compare representative hardware and software cache coherence schemes for a large-scale shared-memory system. Our goal is to identify the workl...
Sarita V. Adve, Vikram S. Adve, Mark D. Hill, Mary...
CGF
2006
136views more  CGF 2006»
13 years 9 months ago
Cache-Efficient Layouts of Bounding Volume Hierarchies
We present a novel algorithm to compute cache-efficient layouts of bounding volume hierarchies (BVHs) of polygonal models. Our approach does not make any assumptions about the cac...
Sung-Eui Yoon, Dinesh Manocha
INFOCOM
2002
IEEE
14 years 1 months ago
Topologically-Aware Overlay Construction and Server Selection
— A number of large-scale distributed Internet applications could potentially benefit from some level of knowledge about the relative proximity between its participating host no...
Sylvia Ratnasamy, Mark Handley, Richard M. Karp, S...
CHES
2006
Springer
111views Cryptology» more  CHES 2006»
14 years 18 days ago
Cache-Collision Timing Attacks Against AES
This paper describes several novel timing attacks against the common table-driven software implementation of the AES cipher. We define a general attack strategy using a simplified ...
Joseph Bonneau, Ilya Mironov