Sciweavers

5523 search results - page 46 / 1105
» Improving application performance with hardware data structu...
Sort
View
DATE
2008
IEEE
171views Hardware» more  DATE 2008»
14 years 2 months ago
Cache Aware Mapping of Streaming Applications on a Multiprocessor System-on-Chip
Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor systemon-chip. An external memory that is shared between processors is a bottl...
Arno Moonen, Marco Bekooij, Rene van den Berg, Jef...
DSN
2008
IEEE
13 years 9 months ago
Enhanced server fault-tolerance for improved user experience
Interactive applications such as email, calendar, and maps are migrating from local desktop machines to data centers due to the many advantages offered by such a computing environ...
Manish Marwah, Shivakant Mishra, Christof Fetzer
ISCA
2005
IEEE
99views Hardware» more  ISCA 2005»
14 years 1 months ago
Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking
To maintain coherence in conventional shared-memory multiprocessor systems, processors first check other processors’ caches before obtaining data from memory. This coherence che...
Jason F. Cantin, Mikko H. Lipasti, James E. Smith
VLDB
1998
ACM
134views Database» more  VLDB 1998»
13 years 12 months ago
Design, Implementation, and Performance of the LHAM Log-Structured History Data Access Method
Numerous applications such as stock market or medical information systems require that both historical and current data be logically integrated into a temporal database. The under...
Peter Muth, Patrick E. O'Neil, Achim Pick, Gerhard...
MICRO
1997
IEEE
108views Hardware» more  MICRO 1997»
13 years 12 months ago
Improving the Accuracy and Performance of Memory Communication Through Renaming
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
Gary S. Tyson, Todd M. Austin