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ATS
2000
IEEE
134views Hardware» more  ATS 2000»
13 years 12 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...
BMCBI
2006
142views more  BMCBI 2006»
13 years 7 months ago
Improving the Performance of SVM-RFE to Select Genes in Microarray Data
Background: Recursive Feature Elimination is a common and well-studied method for reducing the number of attributes used for further analysis or development of prediction models. ...
Yuanyuan Ding, Dawn Wilkins
DAC
2003
ACM
14 years 8 months ago
A scalable software-based self-test methodology for programmable processors
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...
Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit D...
ASPLOS
2011
ACM
12 years 11 months ago
Improving software diagnosability via log enhancement
Diagnosing software failures in the field is notoriously difficult, in part due to the fundamental complexity of trouble-shooting any complex software system, but further exacer...
Ding Yuan, Jing Zheng, Soyeon Park, Yuanyuan Zhou,...
BMCBI
2007
120views more  BMCBI 2007»
13 years 7 months ago
Re-sampling strategy to improve the estimation of number of null hypotheses in FDR control under strong correlation structures
Background: When conducting multiple hypothesis tests, it is important to control the number of false positives, or the False Discovery Rate (FDR). However, there is a tradeoff be...
Xin Lu, David L. Perkins