Sciweavers

1001 search results - page 164 / 201
» Improving memory hierarchy performance for irregular applica...
Sort
View
ICS
2001
Tsinghua U.
14 years 3 months ago
Slice-processors: an implementation of operation-based prediction
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amir...
IPPS
2003
IEEE
14 years 4 months ago
Extending OpenMP to Support Slipstream Execution Mode
OpenMP has emerged as a widely accepted standard for writing shared memory programs. Hardware-specific extensions such as data placement are usually needed to improve the scalabi...
Khaled Z. Ibrahim, Gregory T. Byrd
ICPP
2008
IEEE
14 years 5 months ago
Enabling Streaming Remoting on Embedded Dual-Core Processors
Dual-core processors (and, to an extent, multicore processors) have been adopted in recent years to provide platforms that satisfy the performance requirements of popular multimed...
Kun-Yuan Hsieh, Yen-Chih Liu, Po-Wen Wu, Shou-Wei ...
PLDI
2006
ACM
14 years 4 months ago
Optimizing data permutations for SIMD devices
The widespread presence of SIMD devices in today’s microprocessors has made compiler techniques for these devices tremendously important. One of the most important and difficul...
Gang Ren, Peng Wu, David A. Padua
MICRO
2003
IEEE
116views Hardware» more  MICRO 2003»
14 years 4 months ago
Universal Mechanisms for Data-Parallel Architectures
Data-parallel programs are both growing in importance and increasing in diversity, resulting in specialized processors targeted at specific classes of these programs. This paper ...
Karthikeyan Sankaralingam, Stephen W. Keckler, Wil...