1001 search results - page 34 / 201 » Improving memory hierarchy performance for irregular applica... |
203
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DAC
2012
ACM
13 years 8 months ago
2012
ACM
Spin-Transfer Torque RAM (STT-RAM) is an emerging non-volatile memory (NVM) technology that has the potential to replace the conventional on-chip SRAM caches for designing a more ...
181
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DATE
2005
IEEE
15 years 8 months ago
2005
IEEE
Memory space limitation is a serious problem for many embedded systems from diverse application domains. While circuit/packaging techniques are definitely important to squeeze la...
186
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PC
2007
15 years 5 months ago
2007
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
183
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CODES
2006
IEEE
16 years 4 days ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
180
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ISCA
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper introduces the idea of using a User-Level Memory Thread (ULMT) for correlation prefetching. In this approach, a user thread runs on a general-purpose processor in main ...