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ICCAD
2007
IEEE
128views Hardware» more  ICCAD 2007»
14 years 4 months ago
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar
SAC
2009
ACM
14 years 2 months ago
An empirical study of incorporating cost into test suite reduction and prioritization
Software developers use testing to gain and maintain confidence in the correctness of a software system. Automated reduction and prioritization techniques attempt to decrease the...
Adam M. Smith, Gregory M. Kapfhammer
CODES
2009
IEEE
14 years 2 months ago
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage med...
Yangsup Lee, Sanghyuk Jung, Yong Ho Song
ISCA
2008
IEEE
112views Hardware» more  ISCA 2008»
14 years 2 months ago
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
In a chip-multiprocessor (CMP) system, the DRAM system is shared among cores. In a shared DRAM system, requests from a thread can not only delay requests from other threads by cau...
Onur Mutlu, Thomas Moscibroda
ISCA
2007
IEEE
111views Hardware» more  ISCA 2007»
14 years 2 months ago
Express virtual channels: towards the ideal interconnection fabric
Due to wire delay scalability and bandwidth limitations inherent in shared buses and dedicated links, packet-switched on-chip interconnection networks are fast emerging as the per...
Amit Kumar 0002, Li-Shiuan Peh, Partha Kundu, Nira...