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» In Situ Design of Register Operations
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DAC
2001
ACM
14 years 10 months ago
High-Quality Operation Binding for Clustered VLIW Datapaths
Clustering is an effective method to increase the available parallelism in VLIW datapaths without incurring severe penalties associated with large number of register file ports. E...
Viktor S. Lapinskii, Margarida F. Jacome, Gustavo ...
ICCS
2001
Springer
14 years 2 months ago
Optimizing Sparse Matrix Computations for Register Reuse in SPARSITY
Abstract. Sparse matrix-vector multiplication is an important computational kernel that tends to perform poorly on modern processors, largely because of its high ratio of memory op...
Eun-Jin Im, Katherine A. Yelick
ISCAS
2007
IEEE
104views Hardware» more  ISCAS 2007»
14 years 3 months ago
Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors
Process variation in future technologies can cause severe performance degradation since different parts of the shared Register File (RF) in VLIW processors may operate at various ...
Praveen Raghavan, José L. Ayala, David Atie...
MICRO
2006
IEEE
115views Hardware» more  MICRO 2006»
14 years 3 months ago
Mitigating the Impact of Process Variations on Processor Register Files and Execution Units
Design variability due to die-to-die and within-die process variations has the potential to significantly reduce the maximum operating frequency and the effective yield of high-p...
Xiaoyao Liang, David Brooks
HPCA
2004
IEEE
14 years 10 months ago
Stream Register Files with Indexed Access
Many current programmable architectures designed to exploit data parallelism require computation to be structured to operate on sequentially accessed vectors or streams of data. A...
Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William ...