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ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
14 years 28 days ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu
ARVLSI
1999
IEEE
112views VLSI» more  ARVLSI 1999»
13 years 11 months ago
Architectural Considerations for Application-Specific Counterflow Pipelines
Application-specific processor design is a promising approach for meeting the performance and cost goals of a system. Application-specific processors are especially promising for ...
Bruce R. Childers, Jack W. Davidson
HPCA
2004
IEEE
14 years 7 months ago
Perceptron-Based Branch Confidence Estimation
Pipeline gating has been proposed for reducing wasted speculative execution due to branch mispredictions. As processors become deeper or wider, pipeline gating becomes more import...
Haitham Akkary, Srikanth T. Srinivasan, Rajendar K...
ICCD
2002
IEEE
151views Hardware» more  ICCD 2002»
14 years 4 months ago
Adaptive Pipeline Depth Control for Processor Power-Management
A method of managing the power consumption of an embedded, single-issue processor by controlling its pipeline depth is proposed. The execution time will be increased but, if the m...
Aristides Efthymiou, Jim D. Garside
DSN
2004
IEEE
13 years 11 months ago
Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline
The progression of implementation technologies into the sub-100 nanometer lithographies renew the importance of understanding and protecting against single-event upsets in digital...
Nicholas J. Wang, Justin Quek, Todd M. Rafacz, San...