17 search results - page 3 / 4 » Increasing Register File Immunity to Transient Errors |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
—Soft error rates are an increasing problem in modern VLSI circuits. Commonly used error correcting codes reduce soft error rates in large memories and second level caches but ar...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
Device scaling trends dramatically increase the susceptibility of microprocessors to soft errors. Further, mounting demand for embedded microprocessors in a wide array of safety c...
DATE
2010
IEEE
14 years 21 days ago
2010
IEEE
—With the advancement of CMOS manufacturing process to nano-scale, future shipped microprocessors will be increasingly vulnerable to intermittent faults. Quantitatively character...
VTS
2007
IEEE
14 years 1 months ago
2007
IEEE
Conventional error correcting code (ECC) schemes used in memories and caches cannot correct double bit errors caused by a single event upset (SEU). As memory density increases, mu...
DFT
2007
IEEE
14 years 1 months ago
2007
IEEE
Decreasing feature sizes have led to an increased vulnerability of random logic to soft errors. A particle strike may cause a glitch or single event transient (SET) at the output ...