Sciweavers

23 search results - page 2 / 5
» Increasing and Detecting Memory Address Congruence
Sort
View
HICSS
1994
IEEE
139views Biometrics» more  HICSS 1994»
13 years 10 months ago
Operating System Support for Shared Memory Clusters
This paper addresses a purely software-based solution to the multiprocessor cache coherence problem by structuring an operating system to provide for the coherence of its own data...
Ronald L. Rockhold, James L. Peterson
DSN
2006
IEEE
13 years 10 months ago
Efficiently Detecting All Dangling Pointer Uses in Production Servers
In this paper, we propose a novel technique to detect all dangling pointer uses at run-time that is efficient enough for production use in server codes. One idea (previously used ...
Dinakar Dhurjati, Vikram S. Adve
ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
14 years 1 months ago
Memory mapped ECC: low-cost error protection for last level caches
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
Doe Hyun Yoon, Mattan Erez
VTS
2007
IEEE
203views Hardware» more  VTS 2007»
14 years 26 days ago
Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance Based SEC-DED-DAEC Code
Conventional error correcting code (ECC) schemes used in memories and caches cannot correct double bit errors caused by a single event upset (SEU). As memory density increases, mu...
Avijit Dutta, Nur A. Touba
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 3 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...