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CODES
2005
IEEE
14 years 3 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
SIGCOMM
2005
ACM
14 years 3 months ago
Using redundancy to cope with failures in a delay tolerant network
We consider the problem of routing in a delay tolerant network (DTN) in the presence of path failures. Previous work on DTN routing has focused on using precisely known network dy...
Sushant Jain, Michael J. Demmer, Rabin K. Patra, K...
WIKIS
2005
ACM
14 years 3 months ago
WikiWiki weaving heterogeneous software artifacts
Good documentation benefits every software development project, especially large ones, but it can be hard, costly, and tiresome to produce when not supported by appropriate tools...
Ademar Aguiar, Gabriel David
GECCO
2005
Springer
195views Optimization» more  GECCO 2005»
14 years 3 months ago
Evolving fuzzy decision tree structure that adapts in real-time
A fuzzy logic algorithm has been developed that automatically allocates electronic attack (EA) resources distributed over different platforms in real-time. The controller must be ...
James F. Smith III
SG
2005
Springer
14 years 3 months ago
Multi-level Interaction in Parametric Design
Parametric design systems model a design as a constrained collection of schemata. Designers work in such systems at two levels: definition of schemata and constraints; and search w...
Robert Aish, Robert Woodbury
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