122 search results - page 11 / 25 » Influence of compiler optimizations on system power |
DAC
2000
ACM
14 years 8 months ago
2000
ACM
In this paper, we presen t the design and use of a comprehensiv e framework, SimplePower, for evaluating the e ect of high-level algorithmic, architectural, and compilation tradeo...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
LCTRTS
2000
Springer
13 years 11 months ago
2000
Springer
This paper presents a general approach to automatically validate code-improving transformations on low-level program representations. The approach ensures the correctness of compi...
HIPEAC
2007
Springer
13 years 11 months ago
2007
Springer
Fine-grained program power behavior is useful in both evaluating power optimizations and observing power optimization opportunities. Detailed power simulation is time consuming and...