The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have develop...
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa...
More and more companies use "process aware" information systems to make their business processes more efficient. To do this, workflow definitions must be formulated in a ...
VIMS Lab is situated in Department of Computer & Information Sc, University of Delaware, Newark, DE. USA.
At VIMS we work on various problems related to image/video processing...
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...