174 search results - page 25 / 35 » Instruction Fetch Mechanisms for Multipath Execution Process... |
APCSAC
2005
IEEE
14 years 1 months ago
2005
IEEE
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
DFT
2003
IEEE
14 years 25 days ago
2003
IEEE
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
APCSAC
2007
IEEE
14 years 1 months ago
2007
IEEE
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
ASPLOS
2004
ACM
14 years 29 days ago
2004
ACM
Dynamic information flow tracking is a hardware mechanism to protect programs against malicious attacks by identifying spurious information flows and restricting the usage of sp...
ISCA
2003
IEEE
14 years 24 days ago
2003
IEEE
To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time...