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DATE
2005
IEEE
151views Hardware» more  DATE 2005»
14 years 3 months ago
Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications
Instruction Level Parallelism (ILP) extraction for multicluster VLIW processors is a very hard task. In this paper, we propose a retargetable architecture that can exploit ILP and...
Domenico Barretta, William Fornaciari, Mariagiovan...
PLDI
2000
ACM
14 years 2 months ago
Exploiting superword level parallelism with multimedia instruction sets
Increasing focus on multimedia applications has prompted the addition of multimedia extensions to most existing general purpose microprocessors. This added functionality comes pri...
Samuel Larsen, Saman P. Amarasinghe
IEEECIT
2007
IEEE
14 years 4 months ago
Indirect Tag Search Mechanism for Instruction Window Energy Reduction
Instruction window is a key component which extracts Instruction Level Parallelism (ILP) in modern out-of-order microprocessors. In order to exploit ILP for improving processor pe...
Shingo Watanabe, Akihiro Chiyonobu, Toshinori Sato
HICSS
1995
IEEE
128views Biometrics» more  HICSS 1995»
14 years 1 months ago
Instruction Level Parallelism
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...