138 search results - page 7 / 28 » Instruction Scheduling and Executable Editing |
ISQED
2008
IEEE
14 years 2 months ago
2008
IEEE
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay also has variat...
IISWC
2006
IEEE
14 years 1 months ago
2006
IEEE
The load instructions of some of the bioinformatics applications in the BioPerf suite possess interesting characteristics: only a few static loads cover almost the entire dynamic ...
ISCAPDCS
2001
13 years 9 months ago
2001
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
The superblock is a scheduling region which exposes instruction level parallelism beyond the basic block through speculative execution of instructions. In general, scheduling supe...
MICRO
1992
IEEE
13 years 12 months ago
1992
IEEE
- We present a compilation technique for scheduling parallelism on fine grained asynchronous MIMD systems. The shape scheduling algorithm is introduced that utilizes the flexibilit...