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ISMVL
2007
IEEE
104views Hardware» more  ISMVL 2007»
14 years 3 months ago
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
Mahsan Amoui, Daniel Große, Mitchell A. Thor...
ASPDAC
2006
ACM
137views Hardware» more  ASPDAC 2006»
14 years 3 months ago
Parameterized block-based non-gaussian statistical gate timing analysis
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
14 years 2 months ago
Interconnect capacitance extraction for system LCD circuits
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimot...
PATMOS
2004
Springer
14 years 2 months ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
ASWEC
2007
IEEE
14 years 1 months ago
Influence Control for Dynamic Reconfiguration
Influence control is a very challenging issue in dynamic reconfiguration and still not well addressed in the literature. This paper argues that dynamic reconfiguration influences s...
Zhikun Zhao, Wei Li