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DAC
2005
ACM
14 years 8 months ago
High performance encryption cores for 3G networks
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
René Cumplido, Tomás Balderas-Contre...
RTCSA
1998
IEEE
14 years 3 days ago
Partition Scheduling in APEX Runtime Environment for Embedded Avionics Software
Advances in the computer technology encouraged the avionics industry to replace the federated design of control units with an integrated suite of control modules that share the co...
Yann-Hang Lee, Daeyoung Kim, Mohamed F. Younis, Je...
FPL
2004
Springer
89views Hardware» more  FPL 2004»
14 years 1 months ago
HW/SW Co-design by Automatic Embedding of Complex IP Cores
Complex SoC and platform-based designs require integration of configurable IP cores from multiple sources. Even automatic compilation flows from a high-level description to HW/SW s...
Holger Lange, Andreas Koch
DAC
2005
ACM
13 years 9 months ago
A watermarking system for IP protection by a post layout incremental router
In this paper, we introduce a new watermarking system for IP protection on post-layout design phase. Firstly the copyright is encrypted by DES (Data Encryption Standard) and then ...
Tingyuan Nie, Tomoo Kisaka, Masahiko Toyonaga
DATE
2008
IEEE
199views Hardware» more  DATE 2008»
14 years 2 months ago
Safe Automatic Flight Back and Landing of Aircraft Flight Reconfiguration Function (FRF)
SOFIA (Safe Automatic Flight Back and Landing of Aircraft) project is a response to the challenge of developing concepts and techniques enabling the safe and automatic return to g...
Juan Alberto Herreria Garcia