3028 search results - page 481 / 606 » Integrating Temporal Logics |
FMCAD
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. We present a formal verification methodology for datapathdominated hardware. This provides a systematic but flexible framework within which to organize the activities und...
FPL
1995
Springer
13 years 11 months ago
1995
Springer
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
ISSS
1995
IEEE
13 years 11 months ago
1995
IEEE
Designers of embedded systems are facing ever tighter constraintson design time, but computer aided design tools for embedded systems have not kept pace with these trends. The Chi...
WSC
2008
13 years 10 months ago
2008
In this paper, an automation concept is proposed to facilitate the simulation model building for port design problem. Currently, this process, which includes drawing the terminal ...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper presents a new test response compaction technique with any number of unknown logic values (X’s) in the test response bits. The technique leverages an X-tolerant respo...