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ASPDAC
2007
ACM
140views Hardware» more  ASPDAC 2007»
13 years 11 months ago
An Architecture for Combined Test Data Compression and Abort-on-Fail Test
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...
Erik Larsson, Jon Persson
ASWEC
2007
IEEE
13 years 11 months ago
Influence Control for Dynamic Reconfiguration
Influence control is a very challenging issue in dynamic reconfiguration and still not well addressed in the literature. This paper argues that dynamic reconfiguration influences s...
Zhikun Zhao, Wei Li
CF
2007
ACM
13 years 11 months ago
Automated generation of layout and control for quantum circuits
We present a computer-aided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we in...
Mark Whitney, Nemanja Isailovic, Yatish Patel, Joh...
DAC
2007
ACM
13 years 11 months ago
Skewed Flip-Flop Transformation for Minimizing Leakage in Sequential Circuits
Mixed Vt has been widely used to control leakage without affecting circuit performance. However, current approaches target the combinational circuits even though sequential elemen...
Jun Seomun, Jaehyun Kim, Youngsoo Shin
DAC
2007
ACM
13 years 11 months ago
Side-Channel Attack Pitfalls
While cryptographic algorithms are usually strong against mathematical attacks, their practical implementation, both in software and in hardware, opens the door to side-channel at...
Kris Tiri