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HIPEAC
2010
Springer
14 years 7 months ago
Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors
Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...
Yunlian Jiang, Kai Tian, Xipeng Shen
ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
14 years 7 months ago
Test-access mechanism optimization for core-based three-dimensional SOCs
— Test-access mechanisms (TAMs) and test wrappers (e.g., the IEEE Standard 1500 wrapper) facilitate the modular testing of embedded cores in a core-based system-on-chip (SOC). Su...
Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yua...
ICCAD
2004
IEEE
180views Hardware» more  ICCAD 2004»
14 years 7 months ago
Physical placement driven by sequential timing analysis
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
Aaron P. Hurst, Philip Chong, Andreas Kuehlmann
ICCAD
2004
IEEE
87views Hardware» more  ICCAD 2004»
14 years 7 months ago
Exploiting level sensitive latches in wire pipelining
Wire pipelining emerges as a new necessity for global wires due to increasing wire delay, shrinking clock period and growing chip size. Existing approaches on wire pipelining are ...
V. Seth, Min Zhao, Jiang Hu
TLDI
2010
ACM
225views Formal Methods» more  TLDI 2010»
14 years 7 months ago
Race-free and memory-safe multithreading: design and implementation in cyclone
We present the design of a formal low-level multi-threaded language with advanced region-based memory management and synchronization primitives, where well-typed programs are memo...
Prodromos Gerakios, Nikolaos Papaspyrou, Konstanti...