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» Intelligent memory manager: Reducing cache pollution due to ...
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CASES
2006
ACM
14 years 1 months ago
A dynamic code placement technique for scratchpad memory using postpass optimization
In this paper, we propose a fully automatic dynamic scratchpad memory (SPM) management technique for instructions. Our technique loads required code segments into the SPM on deman...
Bernhard Egger, Chihun Kim, Choonki Jang, Yoonsung...
MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
14 years 18 days ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...
HIPC
2007
Springer
14 years 1 months ago
Self-optimization of Performance-per-Watt for Interleaved Memory Systems
- With the increased complexity of platforms coupled with data centers’ servers sprawl, power consumption is reaching unsustainable limits. Memory is an important target for plat...
Bithika Khargharia, Salim Hariri, Mazin S. Yousif
CODES
2011
IEEE
12 years 7 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
CIDR
2007
185views Algorithms» more  CIDR 2007»
13 years 8 months ago
Rethinking Data Management for Storage-centric Sensor Networks
Data management in wireless sensor networks has been an area of significant research in recent years. Many existing sensor data management systems view sensor data as a continuou...
Yanlei Diao, Deepak Ganesan, Gaurav Mathur, Prasha...