154 search results - page 23 / 31 » Interconnect Optimization Strategies for High-Performance VL... |
CASES
2006
ACM
14 years 4 months ago
2006
ACM
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. I...
IPPS
2002
IEEE
14 years 3 months ago
2002
IEEE
This paper investigates the design of parallel algorithmic strategies that address the efficient use of both, memory hierarchies within each processor and a multilevel clustered ...
MICRO
2003
IEEE
14 years 3 months ago
2003
IEEE
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
DAC
2009
ACM
14 years 11 months ago
2009
ACM
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...