154 search results - page 4 / 31 » Interconnect Optimization Strategies for High-Performance VL... |
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...
GLVLSI
2009
IEEE
14 years 5 months ago
2009
IEEE
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
CLUSTER
2006
IEEE
14 years 4 months ago
2006
IEEE
As new processor and memory architectures advance, clusters start to be built from larger SMP systems, which makes MPI intra-node communication a critical issue in high performanc...
ICCD
2008
IEEE
14 years 7 months ago
2008
IEEE
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines(T-lin...
ASPDAC
2009
ACM
14 years 4 months ago
2009
ACM
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines is pr...