816 search results - page 133 / 164 » Interconnect design methods for memory design |
ISLPED
2003
ACM
14 years 26 days ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
POPL
2012
ACM
12 years 3 months ago
2012
ACM
In object-oriented programming, unique permissions to object references are useful for checking correctness properties such as consistency of typestate and noninterference of conc...
EUROSYS
2007
ACM
14 years 4 months ago
2007
ACM
We present a memory-aware load balancing (MALB) technique to dispatch transactions to replicas in a replicated database. Our MALB algorithm exploits knowledge of the working sets ...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract— We study leakage-power reduction in standby random access memories (SRAMs) during data-retention. An SRAM cell requires a minimum critical supply voltage (DRV) above wh...
SIGMETRICS
2003
ACM
14 years 26 days ago
2003
ACM
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...