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» Interconnect design methods for memory design
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NOCS
2007
IEEE
14 years 1 months ago
On Characterizing Performance of the Cell Broadband Engine Element Interconnect Bus
Abstract – With the rise of multicore computing, the design of onchip networks (or networks on chip) has become an increasingly important component of computer architecture. The ...
Thomas William Ainsworth, Timothy Mark Pinkston
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
14 years 1 months ago
Performance pathologies in hardware transactional memory
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Y...
ER
2009
Springer
111views Database» more  ER 2009»
14 years 2 months ago
A New Point Access Method Based on Wavelet Trees
Abstract. The development of index structures that allow ecient retrieval of spatial objects has been a topic of interest in the last decades. Most of these structures have been d...
Nieves R. Brisaboa, Miguel Rodríguez Luaces...
ISPD
2000
ACM
86views Hardware» more  ISPD 2000»
13 years 12 months ago
Simulating frequency-dependent current distribution for inductance modeling of on-chip copper interconnects
500+ MHz designs using deep-submicron (DSM) copper interconnects require accurate and efficient modeling of cladding-metals’ frequency-dependent impedance [1]. In this paper, fo...
Li-Fu Chang, Keh-Jeng Chang, Robert Mathews
HIPEAC
2005
Springer
14 years 1 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli