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» Interconnect design methods for memory design
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KDD
2010
ACM
222views Data Mining» more  KDD 2010»
13 years 9 months ago
Large linear classification when data cannot fit in memory
Recent advances in linear classification have shown that for applications such as document classification, the training can be extremely efficient. However, most of the existing t...
Hsiang-Fu Yu, Cho-Jui Hsieh, Kai-Wei Chang, Chih-J...
ISPD
2006
ACM
103views Hardware» more  ISPD 2006»
14 years 1 months ago
High accurate pattern based precondition method for extremely large power/ground grid analysis
In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-...
Jin Shi, Yici Cai, Sheldon X.-D. Tan, Xianlong Hon...
DATE
2008
IEEE
78views Hardware» more  DATE 2008»
14 years 2 months ago
Simultaneous FU and Register Binding Based on Network Flow Method
– With the rapid increase of design complexity and the decrease of device features in nano-scale technologies, interconnection optimization in digital systems becomes more and mo...
Jason Cong, Junjuan Xu
ISPAN
2009
IEEE
14 years 2 months ago
Vector Bank Based Multimedia Codec System-on-a-Chip (SoC) Design
—In this paper, we present a design architecture of implementing a ”Vector Bank” into video encoder system, namely, an H.264 encoder, in order to detect and analyze the movin...
Ruei-Xi Chen, Wei Zhao, Jeffrey Fan, Asad Davari
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
14 years 1 months ago
Yield Enhancement of Digital Microfluidics-Based Biochips Using Space Redundancy and Local Reconfiguration
attributed to the high regularity of memories, PAs and FPGAs, and the ease with which they can be tested and reconfigured to avoid faulty elements. Digital microfluidicsbased bioch...
Fei Su, Krishnendu Chakrabarty, Vamsee K. Pamula