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ICCAD
1999
IEEE
90views Hardware» more  ICCAD 1999»
13 years 12 months ago
An implicit connection graph maze routing algorithm for ECO routing
Abstract-- ECO routing is a very important design capability in advanced IC, MCM and PCB designs when additional routings need to be made at the latter stage of the physical design...
Jason Cong, Jie Fang, Kei-Yong Khoo
SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
14 years 1 months ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft
PLDI
1999
ACM
13 years 12 months ago
Load-Reuse Analysis: Design and Evaluation
Load-reuse analysis finds instructions that repeatedly access the same memory location. This location can be promoted to a register, eliminating redundant loads by reusing the re...
Rastislav Bodík, Rajiv Gupta, Mary Lou Soff...
TCSV
2008
225views more  TCSV 2008»
13 years 7 months ago
Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...
Yen-Lin Lee, T. Q. Nguyen
DAC
2008
ACM
14 years 8 months ago
Miss reduction in embedded processors through dynamic, power-friendly cache design
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
Garo Bournoutian, Alex Orailoglu