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» Interconnect design methods for memory design
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CODES
2004
IEEE
13 years 11 months ago
Efficient exploration of on-chip bus architectures and memory allocation
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
Sungchan Kim, Chaeseok Im, Soonhoi Ha
ISCAS
2008
IEEE
103views Hardware» more  ISCAS 2008»
14 years 2 months ago
A low-power monolithically stacked 3D-TCAM
—This paper presents three techniques to reduce the power consumption in ternary content-addressable memories (TCAMs). The first technique is to use newly developed monolithical...
Mingjie Lin, Jianying Luo, Yaling Ma
ISQED
2010
IEEE
126views Hardware» more  ISQED 2010»
13 years 9 months ago
Modeling and verification of industrial flash memories
We present a method to abstract, formalize, and verify industrial flash memory implementations. Flash memories contain specialized transistors, e.g., floating gate and split gate d...
Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronal...
CAV
2009
Springer
156views Hardware» more  CAV 2009»
14 years 2 months ago
Towards Performance Prediction of Compositional Models in Industrial GALS Designs
Systems and Networks on Chips (NoCs) are a prime design focus of many hardware manufacturers. In addition to functional verification, which is a difficult necessity, the chip desi...
Nicolas Coste, Holger Hermanns, Etienne Lantreibec...
ISCAS
2003
IEEE
83views Hardware» more  ISCAS 2003»
14 years 28 days ago
An Integrated Framework of Design Optimization and Space Minimization for DSP applications
This paper presents an Integrated Framework of Design Optimization and Space Minimization (IDOM) for generating the minimum number of functional units with schedule length and mem...
Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Cha...